Design of ultra high-speed CMOS CML buffers and latches
نویسندگان
چکیده
A comprehensive study of ultra high-speed current-mode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically design a chain of tapered CML buffers is proposed. Next, a new 20GHz regenerative latch circuit will be introduced. Experimental results show a higher performance for the new latch architecture compared to a conventional CML latch circuit at ultra high-frequencies. It is also shown, both through the experiments and by using efficient analytical models, why CML buffers are better than CMOS inverters in high-speed low-voltage applications.
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